OMA: Orchestrated Modeling, Analysis, and Composition Strategies for Resource Management in Embedded Systems

The OMA project sponsored by the National Science Foundation, NSF ITR CCR-0205712.

Principle Investigators:

Research project summaries

  1. Decoupled Power Management Architecture (DPMA) (Chou)
  2. B#: Battery Emulator (Chou)
  3. FDPM breast cancer detector (Chou)
  4. Evaluating instruction-set extensions for configurable programmable processors (Dutt)
  5. Exploration of coarse-grain reconfigurable architectures for embedded systems, using a memory-aware compilation strategy (Dutt)
  6. Fast cycle-accurate simulation for programmable embedded systems (Dutt)
  7. Accurate, high-level estimation of energy dissipation for custom memory modules used in embedded Systems-on-a-Chip (SOC) (Dutt)
  8. Exploring pipelined architectures for programmable processors through generation of HDL code (Dutt)
  9. Validation of programmable SOC architectures (Dutt)
  10. Design space exploration of a parametric system-on-a-chip architecture, with analytical techniques for power and performance evaluation metrics (Givargis)

Students Supported or Partially Supported on Grant

Dexin Li (dli@ece.uci.edu)
Chulsung Park (chulsung@uci.edu)
Keun Sik No (kno@uci.edu)
Mahesh Mamidipaka (maheshmn@ics.uci.edu)
Prabhat Mishra (pmishra@ics.uci.edu)
Arijit Ghosh (arijitg@uci.edu)

Publications

Dexin Li, Qiang Xie, Pai H. Chou,
"Scalable Modeling and Optimization of Mode Transitions Based on Decoupled Power Management Architecture," to appear, in Proc. Design Automation Conference, Anaheim, CA, June 2003.
Pai H. Chou, Chulsung Park, Jae Park, and Kien Pham,
"B#: a Battery Emulator and Profiling Instrument," to appear, International Symposium on Low Power Electronic Design, Seoul, Korea, August 2003.
J. Lee, K. Choi and N.D. Dutt,
"Mapping Loops on Coarse-Grain Reconfigurable Architectures using Memory Operation Sharing," 1st Workshop on Application Specific Processors (WASP-1), Istanbul, Turkey, November 2002.
J. Lee, K. Choi and N.D. Dutt,
"Efficient Instruction Encoding for Automatic Instruction Set Design of Configurable ASIPs," Proceedings of the International Conference on Computer-Aided Design 2002 (ICCAD-2002), November 2002.
P.R. Panda and N.D. Dutt,
"Memory Architecture Exploration for Embedded Systems," Proceedings of the 9th International Conference on High Performance Computing (HiPC02), December 2002.
M. Mamidipaka, K. Khouri and N.D. Dutt,
"A Methodology for Accurate Modeling of Energy Dissipation in Array Structures," Proceedings of VLSI Design 2003, January 2003.
J. Lee, K. Choi and N.D. Dutt,
"Compiling for Coarse-grain Reconfigurable Architectures Exploiting Memory Operation Sharing," IEEE Design and Test of Computers, Special Issue on Application Specific Processors, January/February 2003.
M. Reshadi, P. Mishra, and N.D. Dutt,
"Instruction Set Compiled Simulation: A Technique for Fast and Flexible Instruction Set Simulation", Proceedings of Design Automation Conference 2003 (DAC 2003) , pages xx-yy, Anaheim, USA, June 2-6, 2003.
J. Lee, K. Choi, and N.D. Dutt,
" An Algorithm For Mapping Loops Onto Coarse-Grained Reconfigurable Architectures," Proceedings of LCTES-03, San Diego, June 2003.
J. Lee, K. Choi, and N.D. Dutt,
"Evaluating Memory Architectures for Media Applications on Coarse-Grained Reconfigurable Architectures," Proceedings of IEEE 14th International Conference on Application-specific Systems, Architectures and Processors (ASAP-2003), The Hague, June 2003.
P. Mishra, A. Kejariwal, and N. Dutt,
" Rapid Exploration of Pipelined Processors through Automatic Generation of RTL Models," Proceedings of RSP-2003, San Diego, June 2003
P. Mishra and N.D. Dutt,
"A Framework for Validation of Programmable Embedded Systems driven by an Architecture Description Language," Proceedings of MTV-2003, Austin, TX, June 2003.
T. Givargis.
"Improved Indexing for Cache Miss Reduction in Embedded Systems," Design Automation Conference (DAC), Anaheim, June 2003.
A. Ghosh, T. Givargis.
"Analytical Design Space Exploration of Caches for Embedded Systems," Design Automation and Test in Europe (DATE), Munich, March 2003.